1. Field of the Invention
The present invention generally relates to a method for producing PMOS devices, and more particularly to a method for preventing boron segregation and out diffusion in the production of PMOS devices.
2. Description of the Prior Art
Continuous expansion of integrated circuit density requires chip area to be maintained or even become smaller in order to reduce circuit unit cost . The only solution to this is an endless diminishment of design rule. Moreover, once devices shrink in size, the degree of shrinkage in gate sizes is even greater than other design rules, and this is mainly because of the need to take the device efficiency into consideration. The junctions of the source/drain regions must be shallow enough to avoid short channel effect when devices shrink in size. Therefore, boron ions (boron or boron fluoride) with low energy and high dosage must be used, and shallow junctions of PMOS devices are formed by carrying out ion implantation. But thermal diffusion might occur inside the silicon wafer that is caused by the implanted boron ions during a follow-up annealing process. This results in low resistivity source/drain regions and high driving current because the boron ion density closest to the wafer""s surface is decreased. Furthermore, semiconductor device performance is worsened.
In accordance with the present invention, a method is provided for forming PMOS devices that substantially prevents boron segregation and out diffusion.
It is an object of the present invention to provide a method to prevent boron segregation and out diffusion for producing PMOS devices, because a thin silicon nitride layer is formed using rapid thermal chemical vapor deposition in the present invention. Although a crystallized structure on the silicon wafer""s surface can be recovered during a follow-up annealing process, thermal diffusion might occur inside the silicon wafer that is caused by the implanted boron ions. Hence, the boron ion density closest to the wafer""s surface will be decreased. By means of the formation of this thin silicon nitride layer, reduction of boron ion density close to the surfaces of source/drain regions due to thermal diffusion can be effectively prevented during the annealing process. Therefore, the boron ion density closest to the wafer""s surface can be maintained.
It is another object of the present invention to provide a method of low resistivity source/drain regions and high driving current for producing PMOS devices by a thin silicon nitride layer formed by using rapid thermal chemical vapor deposition. Moreover, during a follow-up annealing process, thermal diffusion might occur inside the silicon wafer that is caused by the implanted boron ions. Hence, the boron ion density close to the wafer""s surface will be decreased and thid will result in higher resistivity and lower driving current. By means of the formation of this thin silicon nitride layer, the boron ion dens loses to the wafer""s surface can be maintained, resulting in low resistivity source/drain regions and high driving current, furthermore, semiconductor device performance is improved.
It is a further object of the present invention to provide a method that effectively reduces fringing capacitance for producing PMOS devices. Fringing capacitance can be effectively reduced after the removal of this silicon nitride layer, resulting in an improvement in semiconductor performance.
In one embodiment, a method for preventing boron segregation and out diffusion is provided. First of all, a semiconductor substrate is provided and a gate oxide layer as formed as well as a gate layer on top of the semiconductor substrate. Next, a photoresist layer is formed on a top surface of the gate layer. Moreover, a pattern is transferred onto the photoresist layer after undergoing an exposure and a development. Furthermore, the gate layer and the gate oxide layer are then etched using the photoresist layer as a mask, and the photoresist layer is removed afterward. In sucession, a thin silicon nitride layer is grown by utilizing rapid thermal chemical-vapor-deposition (RTCVD) processing.
Thereafter, high doped drain regions of boron ion shallow junctions are formed by carrying out ion implantation. A silicon oxide layer is deposited by using low pressure chemical vapor deposition (LPCVD), and spacers are formed by etching the silicon oxide layer. Next, heavily doping of boron ions proceeds, as well as an annealing process. The thin silicon nitride layer is etched using a diluted phosphoric acid solution. The final stage is a procedure of forming metal silicides.